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specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general el ectronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. 42308 ms / 31407 ms pc / 63005 ms pc no.8370-1/12 LV23100V overview the LV23100V is a one-chip tuner ic incorporating pll for portable audio system. functions ? am tuner ? fm tuner ? mpx stereo decoder ? pll frequency synthesizer specifications maximum ratings at ta = 25 c parameter symbol conditions ratings unit v cc max v cc 4.0 v maximum supply voltage v dd max v dd 4.0 v v in 1 max ce, ci, cl 6.0 v maximum input voltage v in 2 max xin v dd +0.3 v allowable power dissipation pd max ta 70 c 180 mw v o 1 max do 6.0 v v o 2 max xout, pd v dd +0.3 v maximum output voltage v o 3 max bo1, bo2, aout 12.0 v operating temperature topr -20 to +70 c storage temperature tstg -40 to +125 c note : this product should be handled with care because t he resistance against electrostatic discharge damage is low. ordering number : en8370b bi-cmos ic for portable audio system 1-chip tuner ic incorporating pll ? ccb is a registered trademark of sanyo electric co., ltd. ? ccb is sanyo semiconductor's original bus format. all bus addresses are managed by sanyo semiconductor for this format.
LV23100V no.8370-2/12 operating condition at ta = 25 c parameter symbol conditions ratings unit v cc 3.0 v recommended supply voltage v dd 3.0 v v cc op 2.2 to 3.6 v operating supply voltage range v dd op 2.2 to 3.6 v pll block allowable operating range at ta = -20 c to +70 c, v ss = 0v ratings parameter symbol conditions min typ max unit supply voltage v dd 2.2 3.6 v input high level voltage v ih ce, cl, di 0.7v dd 6.0 v input low level voltage v il ce, cl, di 0 0.3v dd - v o 1 do 0 6.0 v output voltage v o 2 bo1, bo2, aout 0 10 v f in 1 xin ; v in 1 75 khz f in 2 fmin ; v in 2 10 160 mhz f in 3 amin (sns = 1) ; v in 3 2 40 mhz operating frequency f in 4 amin (sns = 0) ; v in 4 0.5 10 mhz note : due attention must be paid on leak because the xin pin has an extremely high input impedance. operating characteristics at ta = 25 c, v cc = v dd = 3.0v, see the specified circuit. ratings parameter symbol conditions min typ max unit [current dissipation] fm tuner block i cc fm no input in fm mode 9 12.5 16 ma am tuner block i cc am no input in am mode 4 6 8 ma pll block i dd fm fr = 98mhz, no input at tuner 1 2 4 ma [fm-fe characteristics] : fc = 98mhz, fm = 1khz, dev = 22.5khz 3db sensitivity -3dbls v in = 60db v emf reference, -3db input 10 db v emf actual sensitivity qs s/n = input at s/n = 30db 13 db v emf [fm-if characteristics] : fc = 10.7mhz, fm = 1khz, dev = 75khz (l+r = 90%, pilot = 10%) demodulation output v o v in = 100db v 140 180 210 mvrms 3db sensitivity ls v in = 100db v reference, -3db input 26 31 36 db v signal-to-noise ratio s/n v in = 100db v 63 70 db if count sensitivity if-c1 0%mod, sdc = 1 42 50 56 db v total harmonic distortion thd v in = 100db v, main-mod 0.5 1.5 % separation sep v in = 100db v, l output/r output 25 40 db mute attenuation mute v in = 100db v, l output 55 60 db [am characteristics] : fc = 1000khz, fm = 1khz, 30%mod demodulation output v o v in = 80db v 30 50 70 mvrms signal-to-noise ratio 1 s/n1 v in = 23db v 15 20 db signal-to-noise ratio 2 s/n2 v in = 80db v 47 53 db total harmonic distortion thd v in = 80db v 0.5 1.5 % if count sensitivity if-c 0%mod 20 27 34 db v continued on next page.
LV23100V no.8370-3/12 continued from preceding page. ratings parameter symbol conditions min typ max unit [pll characteristics] internal return resistance rf xin 8 m ? built-in output resistance rd xout 250 k ? hysteresis width vhis ce, cl, di 0.1v dd v output high level voltage v oh pd ; i o = -1ma v dd -1.0 v v ol 1 pd ; i o = 1ma 1.0 v bo1, bo2 ; i o = 1ma 0.25 v v ol 2 bo1, bo2 ; i o = 5ma 1.25 v v ol 3 do ; i o = 1ma 0.25 v output low level voltage v ol 4 aout ; i o = 1ma, ain = 2.0v 0.5 v i ih 1 ce, cl, di ; v i = 6.0v 5.0 a i ih 2 xin ; v i = v dd 0.16 0.9 a input high level current i ih 3 ain ; v i = 6.0v 200 na i il 1 ce, cl, di ; v i = 0v 5.0 a i il 2 xin ; v i = 0v 0.16 0.9 a input low level current i il 3 ain ; v i = 0v 200 na ioff1 bo1, aout, bo2 ; v o = 10v 5.0 a output off-leak current ioff2 do ; v o = 6.0v 5.0 a ?h? level 3-state off-leak current ioffh pd ; v o = 6.0v 0.01 200 na ?l? level 3-state off-leak current ioffl pd ; v o = 0v 0.01 200 na package dimensions unit : mm (typ) 3247a sanyo : ssop36(275mil) 1 36 18 19 0.8 15.0 0.5 7.6 0.2 0.3 (0.7) 5.6 (1.5) 1.7max 0.1
LV23100V no.8370-4/12 composition of di control data (serial data input) (1) in mode (2) in2 mode description of di control data no. control block data description related data (1) do pin control data doc0 doc1 doc2 ? data to set the dividing number of programmable divider binary value with p15 assumed to be msb. lsb varies according to dvs and sns. (* : don?t care) dvs sns lsb set dividing number (n) actual dividing number 1 0 0 * 1 0 p0 p0 p4 272 to 65535 272 to 65535 4 to 4095 twice the set value set value set value * p0 to p3 invalid when lsb : p4 ? to select the signal input (fmin, amin) to the programmable divider and to change the input frequency range. (* : don?t care) dvs sns input operation frequency range 1 0 0 * 1 0 fmin amin amin 10 to 160mhz 2 to 40mhz 0.5 to 10mhz continued on next page. p0 p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12 p13 p14 p15 sns dvs cte 0 r0 r1 r2 r3 0 0 0 1 0 1 0 0 di (1)p-ctr (3)if-ctr (2)r-ctr address address (3)if-ctr 0 1 0 bo2 bo1 ifsw bdsw stsw sdc doc0 doc1 doc2 ul0 ul1 dz 0 gt0 gt1 dlc xs 1 test0 test1 test2 1 0 0 1 0 1 0 0 di (11)dz-c (5)ifsw (7)stsw (9)do-c (10)unloc k (4)o-port (12)pd-c (2)r-ctr (13)test (6)bdsw (8)sd-c
LV23100V no.8370-5/12 continued from preceding page. no. control block data description related data (2) reference divider data r0 to r3 xs ? reference frequency (fref) selection data r3 r2 r1 r0 reference frequency 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 25khz 25khz 25khz 25khz 12.5khz 6.25khz 3.125khz 3.125khz 1 1 1 1 0 0 0 0 0 0 1 1 0 1 0 1 5khz 5khz 5khz 1khz 1 1 1 1 0 0 0 1 3khz 15khz 1 1 1 0 pll inhibit+x?tal osc stop 1 1 1 1 pll inhibit * pll inhibit ? the programmable divider and if counter stop, with fmin, amin, and if in inputs being in the pull-down condition (gnd), and the charge pump has the high impedance. ? xs must be zero. (3) if counter control data cte gt0, gt1 ? if counter counting start data cte = 1 : counting start = 0 : counting start ? determines the counting time of universal counter gt1 gt0 counting time wait time 0 0 1 1 0 1 0 1 4ms 8ms 16ms 32ms 3 to 4ms 3 to 4ms 3 to 4ms 3 to 4ms (4) output port data bo1 , bo2 ? data to determine output of output ports bo1 and bo2 ?data? = 0 : open 1 : low (5) mute control data ifsw ? data to determine the output of output port ifsw, controlling the mute function. ?data? = 0 : at receiving 1 : mute (6) fm/am band selection control data bdsw ? data to determine the output of output port bdsw, controlling selection of band. ?data? = 0 : am 1 : fm (7) forced monaural control data stsw ? data to determine the output of output port stsw, controlling the forced stereo functions. ?data? = 0 : mono 1 : stereo (8) sd sensitivity control data sdc ? data to determine the output of output port sdc, controlling the fm-sd sensitivity (at if input). sdc fm-sd sensitivity 0 1 38db v 48db v continued on next page.
LV23100V no.8370-6/12 continued from preceding page. no. control block data description related data (9) do pin control data doc0 doc1 doc2 ? data to determine the output of the do pin. doc2 doc1 doc0 do pin condition 0 0 0 0 0 0 1 1 0 1 0 1 open low when unlock is detected. end-uc (see the item with asterisk below) open 1 1 1 1 0 0 1 1 0 1 0 1 open low when stereo low when sdon open ? the open condition is selected at power on/reset. * if counter counting end check with end-uc set and if counter starting (cte = 0 1), do pin opens automatically. at end of counting of the if counter, do pin goes low and check on counting end can be made. do pin opens when serial data is entered/output (ce pin : hi) note : do pin is always in the open condition during data input (in1 and in2 modes, during ce : hi period), regardless of do pin control data (doc0 to 2). in the do pin condition during data output (out mode, ce-hi period), the content of internal do serial data is output in synchronization with cl, regardless of do pin control data (doc). ul0, ul1 cte (10) unlock detection data ul0, ul1 ? phase error ( e) detection width selection data to judge if pll is locked. ? phase error exceeding the detection width is judged t hat pll is locked (* : don?t care) ul1 ul0 e detection width detection output 0 0 1 0 1 * stop 0 6.67 s open direct output of e e extended by 1 to 2 ms * do pin is low. serial data output : ul = 0. doc0 doc1 doc2 (11) phase comparator control data dz ? data to control the dead zone of phase comparator dz charge pump output 0 1 dza dzb dead zone width : dza LV23100V no.8370-7/12 do control data (serial data output) composition (1) out mode description of do output data no. control block data description related data (1) sd and stereo indicators control data stind, sdind ? data latching sd and stereo indicator conditions. latching made in the data output (out) mode. sdind sd indicator condition 0 : sd on, 1 : sd off stind stereo indicator condition 0 : st on, 1 : st off (2) pll unlock data ul ? data latching the content of unlock detection circuit ul 0 : at unlock 1 : at lock or detection stop mode ul0 ul1 (3) if counter, binary counter c19 to c0 ? data latching the content of if counter (20-bit binary counter) c19 msb of binary counter c0 msb of binary counter cte gt0 gt1 (1)in-port sdind stind 0 ul c19 c18 c17 c16 c15 c14 c13 c12 c11 c10 c9 c8 c7 c6 c5 c4 c3 c2 c1 c0 0 1 0 1 0 1 0 0 di (3)if-ctr do address (2)unloc k
LV23100V no.8370-8/12 serial data input (in1/in2) tsu, thd, tel, tes, teh 0.75 s tlc < 0.75 s cl : normally hi cl : normally low serial data output (out) tsu, thd, tel, tes, teh 0.75 s tdc, tdh < 0.35 s cl : normally hi cl : normally hi (note) do pin is an nch open drain pin, so that the data varying time (tdc and tdh) differs depending on the pull-up resistance and substrate capacity. internal data tlc teh tes tel thd tsu di cl ce b0 b1 b2 b3 a0 a1 a2 a3 p0 p1 p2 p3 r0 r1 r2 r3 internal data tlc teh tes tel thd tsu r3 r2 r1 p3 p2 p1 p0 a3 a2 a1 a0 b3 b2 b1 b0 di cl ce r0 dc tdc tdc tdh teh tes tel thd tsu ul i1 i2 a3 a2 a1 a0 b3 b2 b1 b0 c3 c2 c1 c0 di cl ce dc tdc tdc tdh teh tes tel thd tsu i1 i2 ul a3 c3 c2 c1 c0 a2 a1 a0 b3 b2 b1 b0 di cl ce
LV23100V no.8370-9/12 serial data timing << when cl stops at the ?l? level >> << when cl stops at the ?h? level >> parameter symbol pin conditions min typ max unit data setup time tsu di, cl 0.75 s data hold time thd di, cl 0.75 s clock ?l? level time tcl cl 0.75 s clock ?h? level time tch cl 0.75 s ce wait time tel ce, cl 0.75 s ce setup time tes ce, cl 0.75 s ce hold time the ce, cl 0.75 s data latch change time tlc 0.75 s tdc do, cl data output time tdh do, ce differs depending on the pull-up resistance and substrate capacity 0.35 s tcl teh tes thd tsu old new tlc tdh tdc tel tch vih vil vih vil vih vil vih vih vil vih vil internal data latch do di cl ce tdc vil ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ tcl teh tes thd tsu old new tlc tdh tdc tel tch vih vil vih vil vih vil vih vil vih vih vil internal data latch do di cl ce ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~
LV23100V no.8370-10/12 block diagram and sample application circuit
LV23100V no.8370-11/12 test circuit
LV23100V ps no.8370-12/12 sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probabi lity. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. coil specifications (bottom view) ? fm-bpf : gfwb3 (soshin) 76mhz to 108mhz ? fm-rf : sa-149 (sumida) 3.6mm diameter, air core, 0.6mm wire, 4.5t ? fm-osc : sa-151 (sumida) 3.6mm di ameter, air core, 0.6mm wire, 3.5t ? fm-if filter : sfela10m7ga00 (murata) ? fm-discriminator : cdala10m7ga121 (murata) ? am-osc : sa-181 (sumida) 6-4 37t 3-1 74t 0.06uew fo = 796khz qo 80 l = 140 h ? am-mix : sa-164 (sumida) 1-2 122t 4-6 9t 2-3 62t 0.06uew fo = 450khz, qo 65 c = 180pf ? am-if filter : sfula450ku2b (murata) ? mw bar-antenna : c8e-a0105 (toko) 1-2 67t 3-4 9t fo = 796khz qo = 180min l = 260 h ? crystal oscillator : cfv-206 (citizen) 3 2 1 4 6 s s v pin31 gnd v.d. cc 3 2 1 4 6 s s c.f. gnd v pin5 cc 3 2 1 4 s1 s2 v.d. gnd pin2 pin1 3 2 1 4 this catalog provides information as of april, 2008. specifications and information herein are subject to change without notice.

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